The invention relates to semiconductor devices and, more particularly, to an active structure of a semiconductor device, wherein an isolation layer having trench gap-fill capability within a field region can be formed, although flowable insulating material is used.
As semiconductor devices become more highly integrated, isolation layer formation processes become more difficult to carry out. Thus, isolation layers are typically is formed by Shallow Trench Isolation (STI) methods of forming trenches in a semiconductor substrate, with burying of the trenches. However, in the case of highly integrated devices, the depth of the trench is deeper than the entry width of the trench. Thus, it is very difficult to fill the trenches without forming of voids. This is because the deposition speed is faster at the entry of the trench than at the bottom of the trench when filling the trench with the oxide layer, and an overhang phenomenon in which the entry of the trench is clogged as the oxide layer is deposited is generated, generating a void within the trench.
In order to solve this problem, a method of filling the trench with Spin On Dielectric (SOD) or Spin On Glass (SOG) material has been introduced. In particular, there is a method of fully gap-filling the trench by using PSZ (polysilazane) having flow properties similar to those of water due to low viscosity in the SOD material.
However, in the prior art, since active regions in the device are separated from each other, an edge portion of the field region is opened. Thus, if the trench is gap filled with flowable insulating material, such as PSZ material, deposition material runs down from the edge portion of the field region. Accordingly, the thickness of the film is lowered and gap-filling is difficult.